1. Field of the Invention
The present invention relates to a semiconductor device, and particularly to a semiconductor device used for an active matrix display device.
2. Description of Related Art
In recent years in the field of display device for displaying images, among the semiconductor device, flat panel display devices are rapidly becoming common such as a liquid crystal and an Electro Luminescence (EL) display device that are identified by energy-saving and occupying a small space. In these display devices, several electrodes, lines and devices are provided. Specifically, scanning and signal lines and switching devices such as a Thin Film Transistor (TFT) having a gate and a source/drain electrode are provided in arrays. The TFT array substrate of an active matrix type to control each pixel individually is widely used.
An active matrix TFT array substrate used for a liquid crystal display device that uses liquid crystals as electro-optic devices is disclosed in Japanese Unexamined Patent Application Publication No. 10-268353. In such active matrix TFT array substrate, there are one or more kinds of metal films provided and also a transparent electrode layer including ITO, IZO or the like provided in an input/output terminal portion of pixel electrodes and video signals. In general, there are a plurality of connectors provided in which the metal films and the transparent electrode layers are electrically connected.
Further, to prevent signals delays caused by longer scanning and signal lines and smaller line width thereof associated with a larger and highly-defined (increased number of display pixels) liquid crystal display, materials of electrodes and lines are desired to have low resistance electrically as Al. However if using Al for metal films, a favorable electric contact characteristic with a transparent electrode layer including ITO, IZO or the like cannot be obtained. Therefore as disclosed in Japanese Unexamined Patent Application Publication No. 3-129326 and Japanese Unexamined Patent Application Publication No. 2000-77666, generally a method has been used in which a high-melting point metal film such as Ti, Cr and Mo is formed in the connectors between the metal and transparent electrode films to obtain a favorable electric contact characteristic between Al and the transparent electrode layer through the high-melting point metal film.
However it has now been discovered that as in Japanese Unexamined Patent Application Publication No. 3-129326 and Japanese Unexamined Patent Application Publication No. 2000-77666, if Al and the high-melting point metal are laminated, there has been a problem that a process is required to form the high-melting point metal film. Further, depending on the kind of the high-melting point metal layer, an edge part of the laminated layer line pattern could be an inverse taper shape due to a difference in corrosion potentials in etchant in a etching process for patterning, and thus it has been a problem that a coverage failure is generated in a film formed in a upper layer.